At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Description:
- Work closely with the R&D/BU/Sales team to identify and scope opportunities for Cadence SoC Verification solution including Simulation, and SVG SW whole solution.
- Plan, execute and manage key technical evaluations and benchmark with existing and potential customers.
- Conduct basic and advanced trainings, presentations and demos as necessary.
- Aligned closely with corporate engineering and sales/marketing team on customer requirement for product direction/improvement.
- Understanding customer’s design and verification issues and provide Cadence solution
- Convert the customer’s requirements into a product specification
- Work with R&D to drive the specification into a real product; work with validation team to ensure the quality of the software
Requirements:
- Design or verification experience in IP or SoC chip level.
- Familiar with System Verilog/VHDL and HDL simulators
- Verification Methodology like UVM is required
- Knowledge of Unix and Linux is highly desired
- Strong verbal and written communication skills in English
- Strong teamwork skills with good human relationship
- Experience in EDA tools such as simulator, emulator or prototype, etc will be a plus
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